[INFO]
Name = SDR SDRAM SPD
00 = Number of Serial PD bytes written during module manufacturer\r 01 = 1 byte\r 02 = 2 bytes\r 03 = 3 bytes\r  .     .\r  .     .\r 80 = 128 bytes\r  .     .
01 = Total number of bytes in Serial PD device\r 01 = 2 bytes\r 02 = 4 bytes\r 03 = 8 bytes\r  .     .\r  .     .\r 07 = 128 bytes\r 08 = 256 bytes\r  .     .
02 = Fundamental memory type\r 01 = FPM\r 02 = EDO\r 03 = Pipelined Nibble\r 04 = SDR SDRAM\r 05 = ROM\r 06 = DDR SGRAM\r 07 = DDR SDRAM
03 = Number of row addresses (includes Mixed-size Row addr) This field describes the Row addressing on the module. If there is one physical bank on the module or if there are two physical banks of the same size and organization, then bits 0-3 are used to represent the number of row addresses for each physical bank. If the module has two physical banks of asymmetric size, then bits 0-3 represent the number of row addresses for physical bank 1 and bits 4-7 represent the number of row addresses for physical bank 2 (bank 2 device is 2x bank 1 device width).
04 = # Column Addresses on this assembly (includes Mixed-size Col addr)
05 = # Module Rows on this assembly
06 = Data Width of this assembly
07 = Data Width of this assembly
08 = Voltage interface standard of this assembly
09 = SDRAM Cycle time, CL=X (highest CAS latency)
0A = SDRAM Access from Clock (highest CAS latency)
0B = DIMM Configuration type (non-parity, ECC)
0C = Refresh Rate/Type
0D = Primary SDRAM Width
0E = Error Checking SDRAM width
0F = Minimum Clock Delay Back to Back Random Column Address
10 = Burst Lengths Supported
11 = # of Banks on Each SDRAM Device
12 = CAS# Latencies Supported
13 = CS# Latency
14 = Write Latency
15 = SDRAM Module Attributes
16 = SDRAM Device Attributes
17 = Min SDRAM Cycle time at CL X-1 (2nd highest CAS latency)
18 = SDRAM Access from Clock at CL X-1 (2nd highest CAS latency)
19 = Min SDRAM Cycle time at CL X-2 (3rd highest CAS latency)
1A = Max SDRAM Access from Clock at CL X-2 (3rd highest CAS latency)
1B = Min Row Precharge Time (Trp)
1C = Min Row Active to Row Active (Trrd)
1D = Min RAS to CAS Delay (Trcd)
1E = Minimum RAS Pulse Width (Tras)
1F = Density of each row on module (mixed, non-mixed sizes)
20 = Superset Information (may be used in future)
21 = Superset Information (may be used in future)
22 = Superset Information (may be used in future)
23 = Superset Information (may be used in future)
24 = Superset Information (may be used in future)
25 = Superset Information (may be used in future)
26 = Superset Information (may be used in future)
27 = Superset Information (may be used in future)
28 = Superset Information (may be used in future)
29 = Superset Information (may be used in future)
2A = Superset Information (may be used in future)
2B = Superset Information (may be used in future)
2C = Superset Information (may be used in future)
2D = Superset Information (may be used in future)
2E = Superset Information (may be used in future)
2F = Superset Information (may be used in future)
30 = Superset Information (may be used in future)
31 = Superset Information (may be used in future)
32 = Superset Information (may be used in future)
33 = Superset Information (may be used in future)
34 = Superset Information (may be used in future)
35 = Superset Information (may be used in future)
36 = Superset Information (may be used in future)
37 = Superset Information (may be used in future)
38 = Superset Information (may be used in future)
39 = Superset Information (may be used in future)
3A = Superset Information (may be used in future)
3B = Superset Information (may be used in future)
3C = Superset Information (may be used in future)
3D = Superset Information (may be used in future)
3E = SPD Data Revision Code
3F = Checksum for bytes 0-62 (00h - 3Eh)
40 = Manufacturer¡¦s JEDEC ID code per JEP-108E
41 = Manufacturer¡¦s JEDEC ID code per JEP-108E
42 = Manufacturer¡¦s JEDEC ID code per JEP-108E
43 = Manufacturer¡¦s JEDEC ID code per JEP-108E
44 = Manufacturer¡¦s JEDEC ID code per JEP-108E
45 = Manufacturer¡¦s JEDEC ID code per JEP-108E
46 = Manufacturer¡¦s JEDEC ID code per JEP-108E
47 = Manufacturer¡¦s JEDEC ID code per JEP-108E
48 = Manufacturing Location
49 = Manufacturer¡¦s Part Number
4A = Manufacturer¡¦s Part Number
4B = Manufacturer¡¦s Part Number
4C = Manufacturer¡¦s Part Number
4D = Manufacturer¡¦s Part Number
4E = Manufacturer¡¦s Part Number
4F = Manufacturer¡¦s Part Number
50 = Manufacturer¡¦s Part Number
51 = Manufacturer¡¦s Part Number
52 = Manufacturer¡¦s Part Number
53 = Manufacturer¡¦s Part Number
54 = Manufacturer¡¦s Part Number
55 = Manufacturer¡¦s Part Number
56 = Manufacturer¡¦s Part Number
57 = Manufacturer¡¦s Part Number
58 = Manufacturer¡¦s Part Number
59 = Manufacturer¡¦s Part Number
5A = Manufacturer¡¦s Part Number
5B = Revision Code
5C = Revision Code
5D = Manufacturing Date
5E = Manufacturing Date
5F = Assembly Serial Number
60 = Assembly Serial Number
61 = Assembly Serial Number
62 = Assembly Serial Number
63 = Manufacturer Specific Data
64 = Manufacturer Specific Data
65 = Manufacturer Specific Data
66 = Manufacturer Specific Data
67 = Manufacturer Specific Data
68 = Manufacturer Specific Data
69 = Manufacturer Specific Data
6A = Manufacturer Specific Data
6B = Manufacturer Specific Data
6C = Manufacturer Specific Data
6D = Manufacturer Specific Data
6E = Manufacturer Specific Data
6F = Manufacturer Specific Data
70 = Manufacturer Specific Data
71 = Manufacturer Specific Data
72 = Manufacturer Specific Data
73 = Manufacturer Specific Data
74 = Manufacturer Specific Data
75 = Manufacturer Specific Data
76 = Manufacturer Specific Data
77 = Manufacturer Specific Data
78 = Manufacturer Specific Data
79 = Manufacturer Specific Data
7A = Manufacturer Specific Data
7B = Manufacturer Specific Data
7C = Manufacturer Specific Data
7D = Manufacturer Specific Data
7E = Intel specification frequency
7F = Intel Specification CAS# Latency support
